Careers at Nethra

Job Title: Sr. ASIC Design Engineer
Location: Santa Clara, CA

Job Duties:
Responsible for ASIC design projects, including microarchitecture, design, development, verification and validation of significant sub-blocks of an image- and video-processing pipeline; development of image processor applications; and RTL implementation of ASIC blocks, using Verilog language. Work on verification of different modules and overall system, using C models & scripts + Verilog & System Verilog; FPGA validation and lab debugging of design + preparation of micro-architecture design document and user reference document. Work on analysis and study of design specification and development of corresponding model simulations; testing and verification of algorithms; aid in interface of developed algorithms. Will interact with system-level architects re: image and video-processing system and capturing loosely specified requirements into tightly-specified architectural specification. Will use Verilog & ASIC design and video standards & protocols (AHB and DDR).

Required:

Submit resume to: kiyer@nethra.us.com.